Progress with trying to solve the startup assembly issue on cold power on.

Author: dgarske

hal/nxp_ppc.h

@@ -188,6 +188,7 @@
 
 /* Early C UART checkpoint helper — uses UART0 already initialized by ASM.
  * Safe to call as soon as TLB for CCSR is live (i.e. anywhere in C boot). */
+#ifndef __ASSEMBLER__
 #if defined(DEBUG_UART) && defined(TARGET_nxp_t2080)
 static inline void uart_putc_early(char c)
 {
@@ -199,6 +200,7 @@ static inline void uart_putc_early(char c)
 #else
 static inline void uart_putc_early(char c) { (void)c; }
 #endif
+#endif /* !__ASSEMBLER__ */
 
 /* DDR */
 #ifndef DDR_ADDRESS

src/boot_ppc_start.S

@@ -956,10 +956,11 @@ setup_stack:
 #endif
 
 #ifdef USE_LONG_JUMP
-        /* load absolute address into "LR" and branch return to it */
-        /* Enables long jump in 32-bit */
-        lis     r3,     boot_entry_C@h
-        ori     r3, r3, boot_entry_C@l
+        /* Load boot_entry_C into LR for indirect branch.
+         * Use LOAD_ADDR32, not lis, because e6500 has 64-bit GPRs and lis
+         * sign-extends for addresses >= 0x80000000 (e.g. 0xEFFExxxx becomes
+         * 0xFFFFFFFF_EFFExxxx), causing an instruction TLB miss on blr. */
+        LOAD_ADDR32(r3, boot_entry_C)
         mtlr    r3
         blr
 #else