Progress trying to fix power on issues with L2 cache

Author: dgarske

hal/nxp_ppc.h

@@ -186,6 +186,20 @@
 #define CCSRBAR_PHYS_HIGH 0
 #endif
 
+/* Early C UART checkpoint helper — uses UART0 already initialized by ASM.
+ * Safe to call as soon as TLB for CCSR is live (i.e. anywhere in C boot). */
+#if defined(DEBUG_UART) && defined(TARGET_nxp_t2080)
+static inline void uart_putc_early(char c)
+{
+    volatile uint8_t *lsr = (volatile uint8_t *)(CCSRBAR + 0x11C505UL);
+    volatile uint8_t *thr = (volatile uint8_t *)(CCSRBAR + 0x11C500UL);
+    while (!(*lsr & 0x20)) {}  /* poll THRE */
+    *thr = (uint8_t)c;
+}
+#else
+static inline void uart_putc_early(char c) { (void)c; }
+#endif
+
 /* DDR */
 #ifndef DDR_ADDRESS
 #define DDR_ADDRESS  0x00000000UL

hal/nxp_t2080.c

@@ -235,12 +235,15 @@ void hal_ddr_init(void)
 #ifdef ENABLE_DDR
     uint32_t reg;
 
+    uart_putc_early('Q');   /* checkpoint Q: entered hal_ddr_init */
+
     /* Map LAW for DDR */
     set_law(4, 0, DDR_ADDRESS, LAW_TRGT_DDR_1, LAW_SIZE_2GB, 0);
 
     /* If DDR is already enabled then just return */
     reg = get32(DDR_SDRAM_CFG);
     if (reg & DDR_SDRAM_CFG_MEM_EN) {
+        uart_putc_early('X');   /* DDR already enabled (Lauterbach?) — early return */
         return;
     }
 
@@ -313,11 +316,15 @@ void hal_ddr_init(void)
     set32(DDR_SDRAM_CFG, reg | DDR_SDRAM_CFG_MEM_EN);
     __asm__ __volatile__("sync;isync");
 
+    uart_putc_early('R');   /* checkpoint R: DDR MEM_EN set, polling D_INIT */
+
     /* Wait for data initialization to complete */
     while (get32(DDR_SDRAM_CFG_2) & DDR_SDRAM_CFG_2_D_INIT) {
         /* busy wait loop - throttle polling */
         udelay(10000);
     }
+
+    uart_putc_early('S');   /* checkpoint S: DDR D_INIT complete */
 #endif /* ENABLE_DDR */
 }
 

src/boot_ppc.c

@@ -128,6 +128,8 @@ void boot_entry_C(void)
     volatile const unsigned int *src;
     volatile unsigned int *end;
 
+    uart_putc_early('I');   /* checkpoint I: entered boot_entry_C */
+
     /* Copy .ramcode section FIRST - to CPC SRAM which is already available.
      * This makes RAMFUNCTION code (memcpy, memmove) available before DDR.
      * Use volatile to prevent compiler from transforming to memcpy call. */
@@ -149,9 +151,13 @@ void boot_entry_C(void)
     }
 #endif
 
+    uart_putc_early('J');   /* checkpoint J: .ramcode done, entering hal_early_init */
+
     /* Now initialize DDR and other hardware */
     hal_early_init();
 
+    uart_putc_early('K');   /* checkpoint K: hal_early_init returned */
+
     /* Copy the .data section from flash to DDR.
      * Use volatile to prevent the compiler from transforming this loop
      * into a memcpy() call. */