Rename LPC54S018M to LPC54S0XX

Author: dgarske

.github/workflows/test-configs.yml

@@ -211,11 +211,11 @@ jobs:
       arch: ppc
       config-file: ./config/examples/nxp-t2080.config
 
-  nxp_lpc54s018m_test:
+  nxp_lpc54s0xx_test:
     uses: ./.github/workflows/test-build.yml
     with:
       arch: arm
-      config-file: ./config/examples/nxp_lpc54s018m.config
+      config-file: ./config/examples/nxp_lpc54s0xx.config
 
   nxp_ls1028a_test:
     uses: ./.github/workflows/test-build.yml

Makefile

@@ -334,7 +334,7 @@ wolfboot.efi: wolfboot.elf
 wolfboot.bin: wolfboot.elf
 	@echo "\t[BIN] $@"
 	$(Q)$(OBJCOPY) $(OBJCOPY_FLAGS) -O binary $^ $@
-ifeq ($(TARGET),nxp_lpc54s018m)
+ifeq ($(TARGET),nxp_lpc54s0xx)
 	@echo "\t[LPC] enhanced boot block"
 	$(Q)python3 -c "import struct,os;f=open('$@','r+b');sz=os.path.getsize('$@');f.seek(0x24);f.write(struct.pack('<2I',0xEDDC94BD,0x160));f.seek(0x160);f.write(struct.pack('<25I',0xFEEDA5A5,3,0x10000000,sz-4,0,0,0,0,0,0xEDDC94BD,0,0,0,0x001640EF,0,0,0x1301001D,0,0,0,0x00000100,0,0,0x04030050,0x14110D09));f.seek(0);d=f.read(28);w=struct.unpack('<7I',d);s=sum(w)&0xFFFFFFFF;ck=(0x100000000-s)&0xFFFFFFFF;f.seek(0x1C);f.write(struct.pack('<I',ck));f.close();print('\tvector checksum: 0x%08X'%ck)"
 endif

arch.mk

@@ -1189,7 +1189,7 @@ ifeq ($(TARGET),lpc)
   endif
 endif
 
-ifeq ($(TARGET),nxp_lpc54s018m)
+ifeq ($(TARGET),nxp_lpc54s0xx)
   ARCH_FLASH_OFFSET=0x10000000
   LDFLAGS+=-Wl,--no-warn-rwx-segments
   # Bare-metal HAL — no NXP SDK dependencies

config/examples/nxp_lpc54s018m.config config/examples/nxp_lpc54s0xx.configconfig/examples/nxp_lpc54s018m.config renamed to config/examples/nxp_lpc54s0xx.config

@@ -2,7 +2,7 @@
 #
 # Target:   NXP LPC54S018M (Cortex-M4F, 180 MHz)
 # Boot:     ROM boot loads wolfBoot from external SPIFI QSPI flash at 0x10000000
-# HAL:      Bare-metal (hal/nxp_lpc54s018m.c) — no NXP MCUXpresso SDK required
+# HAL:      Bare-metal (hal/nxp_lpc54s0xx.c) — no NXP MCUXpresso SDK required
 #
 # Flash layout (SPIFI QSPI, 16 MB total):
 #   0x10000000  wolfBoot (up to BOOT partition base)
@@ -11,7 +11,7 @@
 #   0x101F0000  SWAP sector      (4 KB)
 
 ARCH?=ARM
-TARGET?=nxp_lpc54s018m
+TARGET?=nxp_lpc54s0xx
 
 # Signature and hash algorithms
 SIGN?=ECC256

docs/Targets.md

@@ -1953,7 +1953,7 @@ variants LPC54018M / LPC54S018M). These are Cortex-M4F parts at 180 MHz with
 address `0x10000000`. The boot ROM loads the image from SPIFI via an
 "enhanced boot block" descriptor embedded in the vector table area.
 
-The wolfBoot HAL (`hal/nxp_lpc54s018m.c`) is bare-metal (no NXP SDK
+The wolfBoot HAL (`hal/nxp_lpc54s0xx.c`) is bare-metal (no NXP SDK
 dependency) and targets this whole SPIFI-boot subseries. It has been
 verified on the LPC54S018M-EVK, which uses an on-package Winbond W25Q32JV
 (4MB) and provides an on-board Link2 debug probe (CMSIS-DAP / J-Link) with
@@ -2043,7 +2043,7 @@ The sector size is 4KB, matching the W25Q32JV minimum erase size.
 Copy the example configuration file and build with make:
 
 ```sh
-cp config/examples/nxp_lpc54s018m.config .config
+cp config/examples/nxp_lpc54s0xx.config .config
 make
 ```
 
@@ -2075,7 +2075,7 @@ pyocd reset -t LPC54S018J4MET180
 **Note:** The LPC54S018M boot ROM requires two post-processing steps on
 `wolfboot.bin` before the chip can boot from SPIFI flash. Both are applied
 automatically by the top-level `Makefile` (see the `wolfboot.bin:` rule,
-gated on `TARGET=nxp_lpc54s018m`), so no user action is needed — but they
+gated on `TARGET=nxp_lpc54s0xx`), so no user action is needed — but they
 are documented here because the patched binary will not match the ELF output
 and this affects any external flashing or signing workflow.
 
@@ -2109,10 +2109,10 @@ either message means the binary is not bootable on this chip.
 
 ### LPC54S018M: Testing firmware update
 
-The helper script [`tools/scripts/nxp-lpc54s018m-flash.sh`](../tools/scripts/nxp-lpc54s018m-flash.sh)
+The helper script [`tools/scripts/nxp-lpc54s0xx-flash.sh`](../tools/scripts/nxp-lpc54s0xx-flash.sh)
 automates the full **build → sign → flash** cycle for the LPC54S018M-EVK:
 
-1. Copies `config/examples/nxp_lpc54s018m.config` to `.config`
+1. Copies `config/examples/nxp_lpc54s0xx.config` to `.config`
 2. Runs `make` to produce `factory.bin` (wolfBoot + signed v1 test-app)
 3. Parses the active `.config` to resolve partition and trailer addresses
 4. Erases the BOOT and UPDATE partition trailer sectors (clean boot state)
@@ -2127,13 +2127,13 @@ boards. Run with `--help` for the full option list.
 
 ```sh
 # Build and flash v1 only
-./tools/scripts/nxp-lpc54s018m-flash.sh
+./tools/scripts/nxp-lpc54s0xx-flash.sh
 
 # Build, sign v2, and flash both (full update test)
-./tools/scripts/nxp-lpc54s018m-flash.sh --test-update
+./tools/scripts/nxp-lpc54s0xx-flash.sh --test-update
 
 # Flash existing images without rebuilding
-./tools/scripts/nxp-lpc54s018m-flash.sh --test-update --skip-build
+./tools/scripts/nxp-lpc54s0xx-flash.sh --test-update --skip-build
 ```
 
 **Manual steps** (if not using the script):

hal/nxp_lpc54s018m.c hal/nxp_lpc54s0xx.chal/nxp_lpc54s018m.c renamed to hal/nxp_lpc54s0xx.c

@@ -1,4 +1,4 @@
-/* nxp_lpc54s018m.c
+/* nxp_lpc54s0xx.c
  *
  * Copyright (C) 2025 wolfSSL Inc.
  *

hal/nxp_lpc54s018m.ld hal/nxp_lpc54s0xx.ldhal/nxp_lpc54s018m.ld renamed to hal/nxp_lpc54s0xx.ld

@@ -699,8 +699,8 @@ ifeq ($(TARGET),lpc55s69)
     LDFLAGS+=-Wl,--no-warn-rwx-segments
 endif
 
-ifeq ($(TARGET),nxp_lpc54s018m)
-    LSCRIPT_TEMPLATE=ARM-nxp_lpc54s018m.ld
+ifeq ($(TARGET),nxp_lpc54s0xx)
+    LSCRIPT_TEMPLATE=ARM-nxp_lpc54s0xx.ld
     # Enable RAMFUNCTION for test app (flash ops must run from RAM)
     CFLAGS+=-DRAM_CODE -D__WOLFBOOT
     # string.o provides RAMFUNCTION memcpy; already added when DEBUG_UART=1 (line ~108)

test-app/ARM-nxp_lpc54s018m.ld test-app/ARM-nxp_lpc54s0xx.ldtest-app/ARM-nxp_lpc54s018m.ld renamed to test-app/ARM-nxp_lpc54s0xx.ld

@@ -1,4 +1,4 @@
-/* app_nxp_lpc54s018m.c
+/* app_nxp_lpc54s0xx.c
  *
  * Test application for LPC54S018M-EVK
  *