Add tests and improve docs

Author: dgarske

.github/workflows/test-configs.yml

@@ -211,6 +211,12 @@ jobs:
       arch: ppc
       config-file: ./config/examples/nxp-t2080.config
 
+  nxp_lpc54s018m_test:
+    uses: ./.github/workflows/test-build.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/nxp_lpc54s018m.config
+
   nxp_ls1028a_test:
     uses: ./.github/workflows/test-build.yml
     with:

config/examples/nxp_lpc54s018m.config

@@ -1,21 +1,51 @@
+# wolfBoot configuration for NXP LPCXpresso54S018M-EVK
+#
+# Target:   NXP LPC54S018M (Cortex-M4F, 180 MHz)
+# Boot:     ROM boot loads wolfBoot from external SPIFI QSPI flash at 0x10000000
+# HAL:      Bare-metal (hal/nxp_lpc54s018m.c) — no NXP MCUXpresso SDK required
+#
+# Flash layout (SPIFI QSPI, 16 MB total):
+#   0x10000000  wolfBoot (up to BOOT partition base)
+#   0x10010000  BOOT partition   (960 KB, signed application)
+#   0x10100000  UPDATE partition (960 KB)
+#   0x101F0000  SWAP sector      (4 KB)
+
 ARCH?=ARM
 TARGET?=nxp_lpc54s018m
+
+# Signature and hash algorithms
 SIGN?=ECC256
 HASH?=SHA256
+
 DEBUG?=0
 DEBUG_UART?=1
+
+# Vector table relocation is required — ROM boot leaves VTOR at 0
 VTOR?=1
+
 NO_ASM?=0
+
+# Single-flash layout (all partitions in internal SPIFI region)
 EXT_FLASH?=0
 SPI_FLASH?=0
+
 ALLOW_DOWNGRADE?=0
 NVM_FLASH_WRITEONCE?=0
 WOLFBOOT_VERSION?=0
 V?=0
+
+# Single-precision math (reduced footprint, no ASM)
 SPMATH?=1
+
+# RAM_CODE required: flash erase/program routines must execute from SRAM
+# because SPIFI cannot service instruction fetches while being written
 RAM_CODE?=1
+
 DUALBANK_SWAP?=0
+
+# Enable NXP LPC PKA peripheral for ECC acceleration
 PKA?=1
+
 WOLFBOOT_PARTITION_SIZE?=0xF0000
 WOLFBOOT_SECTOR_SIZE?=0x1000
 WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x10010000

docs/Targets.md

@@ -20,8 +20,8 @@ This README describes configuration of supported targets.
 * [Nordic nRF54L15](#nordic-nrf54l15)
 * [NXP iMX-RT](#nxp-imx-rt)
 * [NXP Kinetis](#nxp-kinetis)
-* [NXP LPC54xxx](#nxp-lpc54xxx)
-* [NXP LPC54S018M](#nxp-lpc54s018m)
+* [NXP LPC546xx](#nxp-lpc546xx)
+* [NXP LPC540xx / LPC54S0xx (SPIFI boot)](#nxp-lpc540xx--lpc54s0xx-spifi-boot)
 * [NXP LPC55S69](#nxp-lpc55s69)
 * [NXP LS1028A](#nxp-ls1028a)
 * [NXP MCXA153](#nxp-mcxa153)
@@ -1897,11 +1897,17 @@ c
 ```
 
 
-## NXP LPC54xxx
+## NXP LPC546xx
+
+This covers the LPC546xx series (Cortex-M4F with internal NOR flash), using the
+NXP MCUXpresso SDK. Tested on LPC54606J512.
+
+For the LPC540xx / LPC54S0xx SPIFI-boot series (no internal flash), see the
+[next section](#nxp-lpc540xx--lpc54s0xx-spifi-boot).
 
 ### Build Options
 
-The LPC54xxx build can be obtained by specifying the CPU type and the MCUXpresso SDK path at compile time.
+The build can be obtained by specifying the CPU type and the MCUXpresso SDK path at compile time.
 
 The following configuration has been tested against LPC54606J512BD208:
 
@@ -1938,15 +1944,22 @@ arm-none-eabi-gdb wolfboot.elf -ex "target remote localhost:3333"
 ```
 
 
-## NXP LPC54S018M
+## NXP LPC540xx / LPC54S0xx (SPIFI boot)
 
-The NXP LPC54S018M is a Cortex-M4 microcontroller running at 180MHz. Unlike the
-LPC54606 which has internal flash, the LPC54S018M has **no internal NOR flash** —
-all code executes from on-package SPIFI-mapped QSPI flash (Winbond W25Q32JV, 4MB)
-at address `0x10000000`.
+This section covers the LPC540xx and LPC54S0xx family (LPC54005, LPC54016,
+LPC54018, LPC54S005, LPC54S016, LPC54S018, and the "M" in-package-flash
+variants LPC54018M / LPC54S018M). These are Cortex-M4F parts at 180 MHz with
+**no internal NOR flash** — all code executes from SPIFI-mapped QSPI flash at
+address `0x10000000`. The boot ROM loads the image from SPIFI via an
+"enhanced boot block" descriptor embedded in the vector table area.
 
-This has been tested on the LPC54S018M-EVK board, which includes an on-board
-Link2 debug probe (CMSIS-DAP / J-Link compatible) and a VCOM UART via Flexcomm0.
+The wolfBoot HAL (`hal/nxp_lpc54s018m.c`) is bare-metal (no NXP SDK
+dependency) and targets this whole SPIFI-boot subseries. It has been
+verified on the LPC54S018M-EVK, which uses an on-package Winbond W25Q32JV
+(4MB) and provides an on-board Link2 debug probe (CMSIS-DAP / J-Link) with
+a VCOM UART on Flexcomm0. Other members of the family should work after
+adjusting the SPIFI device configuration words to match the attached QSPI
+part and sector size.
 
 Because flash erase/write operations disable XIP (execute-in-place), all flash
 programming functions must run from RAM. The configuration uses `RAM_CODE=1` to
@@ -2096,7 +2109,21 @@ either message means the binary is not bootable on this chip.
 
 ### LPC54S018M: Testing firmware update
 
-A convenience script automates the full build, sign, and flash process:
+The helper script [`tools/scripts/nxp-lpc54s018m-flash.sh`](../tools/scripts/nxp-lpc54s018m-flash.sh)
+automates the full **build → sign → flash** cycle for the LPC54S018M-EVK:
+
+1. Copies `config/examples/nxp_lpc54s018m.config` to `.config`
+2. Runs `make` to produce `factory.bin` (wolfBoot + signed v1 test-app)
+3. Parses the active `.config` to resolve partition and trailer addresses
+4. Erases the BOOT and UPDATE partition trailer sectors (clean boot state)
+5. Flashes `factory.bin` to SPIFI at `0x10000000` via `pyocd`
+6. Optionally signs a v2 test-app and flashes it to the update partition
+   to exercise the swap-and-confirm update flow
+
+It drives [pyocd](https://pyocd.io/) with CMSIS-DAP firmware on the on-board
+Link2 probe. Override `CONFIG_FILE`, `PYOCD_TARGET`, or `CROSS_COMPILE` via
+environment variables to adapt the script to other LPC540xx/LPC54S0xx
+boards. Run with `--help` for the full option list.
 
 ```sh
 # Build and flash v1 only

hal/nxp_lpc54s018m.c

@@ -18,12 +18,18 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
  *
- * NXP LPC54S018M HAL for wolfBoot
+ * NXP LPC540xx / LPC54S0xx (SPIFI-boot) HAL for wolfBoot
  *
- * The LPC54S018M has no internal NOR flash. All code executes from
- * on-package SPIFI QSPI flash (W25Q32JV, 4MB) mapped at 0x10000000.
- * Flash operations MUST run from RAM since XIP is disabled during
- * erase/write.
+ * Covers the LPC540xx and LPC54S0xx subseries (LPC54005/54016/54018,
+ * LPC54S005/54S016/54S018, and the in-package flash "M" variants
+ * LPC54018M / LPC54S018M). None of these parts have internal NOR flash —
+ * all code executes from external QSPI flash mapped via SPIFI at
+ * address 0x10000000. Flash operations MUST run from RAM since XIP is
+ * disabled during erase/write.
+ *
+ * Verified on the LPC54S018M-EVK (Winbond W25Q32JV, 4 MB). Other family
+ * members should work after adjusting the SPIFI device configuration words
+ * and sector/partition sizes to match the attached QSPI part.
  *
  * This HAL uses bare-metal register access — no NXP SDK dependencies.
  */

tools/scripts/nxp-lpc54s018m-flash.sh

@@ -2,13 +2,31 @@
 #
 # NXP LPC54S018M-EVK Flash Script
 #
-# This script automates:
-# 1. Configure for NXP LPC54S018M-EVK
-# 2. Build factory.bin (or factory + v2 update)
-# 3. Flash via pyocd (CMSIS-DAP)
+# End-to-end helper to build wolfBoot, sign the test application, and
+# program the LPC54S018M-EVK SPIFI flash via pyocd. Also optionally
+# exercises the A/B update flow by signing a v2 image and loading it
+# into the update partition so wolfBoot will swap on the next boot.
 #
-# The LPC-Link2 debug probe must have CMSIS-DAP firmware.
-# See docs/Targets.md for Link2 probe setup instructions.
+# Flow:
+#   1. Copy config/examples/nxp_lpc54s018m.config to .config
+#   2. make -> factory.bin (wolfBoot + signed v1 test-app)
+#   3. Parse .config to derive partition/trailer addresses
+#   4. Erase BOOT and UPDATE partition trailer sectors (clean boot state)
+#   5. pyocd flash factory.bin @ 0x10000000 (SPIFI base)
+#   6. With --test-update: sign v2, flash at WOLFBOOT_PARTITION_UPDATE_ADDRESS
+#
+# Requirements:
+#   - pyocd + LPC54S018J4MET180 target pack
+#   - arm-none-eabi-gcc toolchain
+#   - LPC-Link2 probe running CMSIS-DAP firmware (see docs/Targets.md:
+#     "LPC54S018M: Link2 debug probe setup")
+#
+# Customization (LPC540xx / LPC54S0xx family):
+#   Override CONFIG_FILE, PYOCD_TARGET, or CROSS_COMPILE via environment to
+#   reuse this script for other LPC540xx / LPC54S0xx boards.
+#
+# See also: docs/Targets.md section
+#   "NXP LPC540xx / LPC54S0xx (SPIFI boot) -> LPC54S018M: Testing firmware update"
 #
 
 set -e