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Expand file tree Collapse file tree Original file line number Diff line number Diff line change @@ -93,6 +93,17 @@ CFLAGS_EXTRA+=-DWOLFBOOT_SHA_BLOCK_SIZE=4096
9393# UART Configuration - UART0 for APU console
9494CFLAGS_EXTRA+=-DDEBUG_UART_NUM=0
9595
96- # QSPI flash debug and test options (uncomment to enable)
97- #CFLAGS_EXTRA+=-DDEBUG_QSPI
98- #CFLAGS_EXTRA+=-DTEST_EXT_FLASH
96+ # QSPI Reference Clock: Ref (300MHz default for Versal)
97+ #CFLAGS_EXTRA+=-DGQSPI_CLK_REF=300000000
98+
99+ # QSPI Bus Divisor: (2 << div) = BUS (0=div2, 1=div4, 2=div8)
100+ # MT25QU01G max: 133MHz Quad Read (0x6C) with 8 dummy cycles
101+ # div=0: 300MHz/2 = 150MHz (above spec but tested working)
102+ # div=1: 300MHz/4 = 75MHz (within spec, default)
103+ # div=2: 300MHz/8 = 37.5MHz (conservative)
104+ #CFLAGS_EXTRA+=-DGQSPI_CLK_DIV=1
105+
106+ # QSPI flash options (uncomment to enable)
107+ #CFLAGS_EXTRA+=-DDEBUG_QSPI # Enable QSPI debug logging
108+ #CFLAGS_EXTRA+=-DGQSPI_MODE_IO # Use polling instead of DMA (slower)
109+ #CFLAGS_EXTRA+=-DTEST_EXT_FLASH # Run flash erase/write/read test
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