Testing fixes and peer review feedback

Author: dgarske

.gitignore

@@ -343,3 +343,4 @@ image.ub
 *.pdi
 system-default.dtb
 test_output/
+sdcard.img

arch.mk

@@ -78,6 +78,11 @@ ifeq ($(ARCH),AARCH64)
       HASH_HAL=1
       CFLAGS+=-DWOLFBOOT_ZYNQMP_CSU
     endif
+
+    # SD card boot uses different DDR load address than QSPI
+    ifeq ($(DISK_SDCARD),1)
+      LSCRIPT_IN=hal/zynq_sd.ld
+    endif
   endif
 
   ifeq ($(TARGET),versal)

config/examples/zynqmp_sdcard.config

@@ -1,5 +1,5 @@
 # wolfBoot configuration for AMD ZynqMP ZCU102 - SD Card Boot
-# Zynq UltraScale+ MPSoC - Dual ARM Cortex-A53
+# Zynq UltraScale+ MPSoC ZU9EG - Quad-core ARM Cortex-A53
 #
 # This configuration enables SD card boot for the ZynqMP:
 #   FSBL -> BL31 (EL3) -> wolfBoot (EL2) -> Linux (EL1)
@@ -76,8 +76,9 @@ CFLAGS_EXTRA+=-DLINUX_BOOTARGS_ROOT=\"/dev/mmcblk1p4\"
 # ============================================================================
 # Boot Memory Layout
 # ============================================================================
-# wolfBoot runs from DDR (matches hal/zynq.ld origin at 0x7FF00000)
-WOLFBOOT_ORIGIN=0x7FF00000
+# wolfBoot runs from DDR at 0x8000000 (same as U-Boot, loaded via BL31)
+# Uses hal/zynq_sd.ld linker script (selected automatically by DISK_SDCARD=1)
+WOLFBOOT_ORIGIN=0x8000000
 
 # Load Partition to RAM Address (Linux kernel loads here)
 WOLFBOOT_LOAD_ADDRESS?=0x10000000

docs/Targets.md

@@ -1984,7 +1984,7 @@ qemu-system-aarch64 -M raspi3b -m 1024 -serial stdio -kernel wolfboot_linux_rasp
 
 ## Xilinx Zynq UltraScale
 
-AMD Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit - Dual ARM Cortex-A53.
+AMD Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit - Quad-core ARM Cortex-A53 (plus dual Cortex-R5).
 
 wolfBoot replaces U-Boot in the ZynqMP boot flow:
 ```

hal/zynq.c

@@ -1563,7 +1563,7 @@ void hal_init(void)
     wolfBoot_printf(bootMsg);
     wolfBoot_printf("Current EL: %d\n", current_el());
 
-#ifdef EXT_FLASH
+#if defined(EXT_FLASH) && (EXT_FLASH == 1)
     qspi_init();
 #endif
 
@@ -1583,7 +1583,7 @@ void hal_init(void)
 
 void hal_prepare_boot(void)
 {
-#if defined(EXT_FLASH) && GQPI_USE_4BYTE_ADDR == 1
+#if defined(EXT_FLASH) && (EXT_FLASH == 1) && GQPI_USE_4BYTE_ADDR == 1
     /* Exit 4-byte address mode */
     int ret = qspi_exit_4byte_addr(&mDev);
     if (ret != GQSPI_CODE_SUCCESS)
@@ -1947,7 +1947,8 @@ void sdhci_platform_init(void)
     volatile uint8_t *base = (volatile uint8_t *)ZYNQMP_SDHCI_BASE;
     uint32_t val;
 
-    wolfBoot_printf("sdhci_platform_init: SD1 at 0x%x\n",
+    wolfBoot_printf("sdhci_platform_init: SD%d at 0x%x\n",
+        (ZYNQMP_SDHCI_BASE == ZYNQMP_SD0_BASE) ? 0 : 1,
         (unsigned int)ZYNQMP_SDHCI_BASE);
 
     /* Read standard SDHCI registers to verify controller access */

hal/zynq.ld

@@ -12,8 +12,11 @@ _EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
 MEMORY
 {
    /* psu_ddr_0_MEM_0 : ORIGIN = 0x0, LENGTH = 0x80000000 */
-   /* Use the end of DDR0 for wolfBoot (reserve 1MB) */
-   psu_ddr_0_MEM_0 : ORIGIN = 0x7FF00000, LENGTH = 0x100000
+   /* wolfBoot DDR location for QSPI boot (2MB reserved):
+    *   Loaded by FSBL to end of DDR0
+    *   For SD card boot see zynq_sd.ld
+    */
+   psu_ddr_0_MEM_0 : ORIGIN = 0x7FF00000, LENGTH = 0x200000
    psu_ddr_1_MEM_0 : ORIGIN = 0x800000000, LENGTH = 0x80000000
    psu_ocm_ram_0_MEM_0 : ORIGIN = 0xFFFC0000, LENGTH = 0x40000
    psu_qspi_linear_0_MEM_0 : ORIGIN = 0xC0000000, LENGTH = 0x20000000