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scorpiochangscorpiochang
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fix something missing of merge
Change-Id: I3b8f01723780788da2d4aff23079ae5e6ee75e93 Reviewed-on: https://tp-biosrd-v02/gerrit/81573 Reviewed-by: Scorpio Chang(張志賢) <Scorpio_Chang@asus.com> Tested-by: Scorpio Chang(張志賢) <Scorpio_Chang@asus.com>
1 parent e2bdc19 commit 39fe87c

6 files changed

Lines changed: 53 additions & 43 deletions

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‎arch/arm/boot/dts/rk3288.dtsi‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1252,6 +1252,8 @@
12521252
resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
12531253
reset-names = "axi", "ahb", "dclk";
12541254
iommus = <&vopb_mmu>;
1255+
assigned-clocks = <&cru DCLK_VOP0>;
1256+
assigned-clock-parents = <&cru PLL_NPLL>;
12551257
status = "disabled";
12561258

12571259
vopb_out: port {
@@ -1513,8 +1515,9 @@
15131515
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
15141516
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>;
15151517
clock-names = "iahb", "isfr", "clk_cec";
1516-
pinctrl-names = "default";
1518+
pinctrl-names = "default", "sleep";
15171519
pinctrl-0 = <&hdmi_ddc &hdmi_cec>;
1520+
pinctrl-1 = <&hdmi_gpio>;
15181521
power-domains = <&power RK3288_PD_VIO>;
15191522
status = "disabled";
15201523

‎arch/arm/configs/rockchip_linux_defconfig‎

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,9 @@ CONFIG_ZSMALLOC=y
4747
CONFIG_SECCOMP=y
4848
CONFIG_ZBOOT_ROM_TEXT=0x0
4949
CONFIG_ZBOOT_ROM_BSS=0x0
50+
CONFIG_ARM_APPENDED_DTB=n
51+
CONFIG_ARM_ATAG_DTB_COMPAT=n
52+
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND=n
5053
CONFIG_CPU_FREQ=y
5154
CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
5255
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
@@ -140,6 +143,8 @@ CONFIG_BT_HCIBTUSB=y
140143
CONFIG_BT_HCIUART=y
141144
CONFIG_BT_HCIUART_H4=y
142145
CONFIG_BT_HCIUART_RTKH5=y
146+
CONFIG_BT_HCIUART_ATH3K=n
147+
CONFIG_BT_HCIUART_LL=n
143148
CONFIG_BT_HCIBFUSB=y
144149
CONFIG_BT_HCIVHCI=y
145150
CONFIG_BT_MRVL=y
@@ -234,6 +239,8 @@ CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
234239
# CONFIG_DEVKMEM is not set
235240
CONFIG_SERIAL_8250=y
236241
CONFIG_SERIAL_8250_CONSOLE=y
242+
CONFIG_SERIAL_8250_NR_UARTS=5
243+
CONFIG_SERIAL_8250_RUNTIME_UARTS=5
237244
CONFIG_SERIAL_8250_DW=y
238245
CONFIG_SERIAL_OF_PLATFORM=y
239246
CONFIG_HW_RANDOM=y
@@ -250,6 +257,7 @@ CONFIG_SPI_SPIDEV=y
250257
CONFIG_DEBUG_GPIO=y
251258
CONFIG_GPIO_SYSFS=y
252259
CONFIG_GPIO_GENERIC_PLATFORM=y
260+
CONFIG_GPIO_TPS65910=n
253261
CONFIG_BATTERY_SBS=y
254262
CONFIG_CHARGER_GPIO=y
255263
CONFIG_CHARGER_BQ24735=y
@@ -266,12 +274,14 @@ CONFIG_MFD_CROS_EC=y
266274
CONFIG_MFD_CROS_EC_SPI=y
267275
CONFIG_MFD_RK808=y
268276
CONFIG_MFD_TPS6586X=y
277+
CONFIG_MFD_TPS65910=n
269278
CONFIG_REGULATOR_FIXED_VOLTAGE=y
270279
CONFIG_REGULATOR_ACT8865=y
271280
CONFIG_REGULATOR_FAN53555=y
272281
CONFIG_REGULATOR_PWM=y
273282
CONFIG_REGULATOR_RK808=y
274283
CONFIG_REGULATOR_TPS6586X=y
284+
CONFIG_REGULATOR_TPS65910=n
275285
CONFIG_MEDIA_SUPPORT=y
276286
CONFIG_MEDIA_CAMERA_SUPPORT=y
277287
CONFIG_MEDIA_USB_SUPPORT=y
@@ -288,11 +298,13 @@ CONFIG_V4L_TEST_DRIVERS=y
288298
CONFIG_VIDEO_IMX219=y
289299
CONFIG_DRM=y
290300
CONFIG_DRM_ROCKCHIP=y
301+
CONFIG_ROCKCHIP_DRM_RGA=n
291302
CONFIG_ROCKCHIP_DW_HDMI=y
292303
CONFIG_ROCKCHIP_DW_MIPI_DSI=y
293304
CONFIG_ROCKCHIP_ANALOGIX_DP=y
294305
CONFIG_ROCKCHIP_INNO_HDMI=y
295306
CONFIG_ROCKCHIP_LVDS=y
307+
CONFIG_ROCKCHIP_RK3066_HDMI=n
296308
CONFIG_DRM_UDL=y
297309
CONFIG_DRM_PANEL_SIMPLE=y
298310
CONFIG_DRM_DW_HDMI_I2S_AUDIO=y
@@ -301,6 +313,7 @@ CONFIG_MALI400=y
301313
CONFIG_MALI_SHARED_INTERRUPTS=y
302314
CONFIG_MALI_DT=y
303315
CONFIG_MALI_DEVFREQ=y
316+
CONFIG_MALI_MIDGARD_FOR_LINUX=y
304317
CONFIG_MALI_MIDGARD=y
305318
CONFIG_MALI_EXPERT=y
306319
CONFIG_MALI_PLATFORM_THIRDPARTY=y
@@ -357,6 +370,8 @@ CONFIG_USB_MON=y
357370
CONFIG_USB_EHCI_HCD=y
358371
CONFIG_USB_EHCI_ROOT_HUB_TT=y
359372
CONFIG_USB_EHCI_HCD_PLATFORM=y
373+
CONFIG_USB_OHCI_HCD=n
374+
CONFIG_USB_OHCI_HCD_PLATFORM=n
360375
CONFIG_USB_ACM=y
361376
CONFIG_USB_STORAGE=y
362377
CONFIG_USB_DWC2=y
@@ -374,6 +389,7 @@ CONFIG_USB_GADGET=y
374389
CONFIG_USB_GADGET_DEBUG_FILES=y
375390
CONFIG_USB_GADGET_VBUS_DRAW=500
376391
CONFIG_USB_CONFIGFS=y
392+
CONFIG_USB_CONFIGFS_ACM=n
377393
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
378394
CONFIG_USB_CONFIGFS_F_FS=y
379395
CONFIG_USB_CONFIGFS_UEVENT=y
@@ -390,6 +406,7 @@ CONFIG_LEDS_GPIO=y
390406
CONFIG_RTC_CLASS=y
391407
CONFIG_RTC_DRV_HYM8563=y
392408
CONFIG_RTC_DRV_RK808=y
409+
CONFIG_RTC_DRV_TPS65910=n
393410
CONFIG_DMADEVICES=y
394411
CONFIG_PL330_DMA=y
395412
CONFIG_STAGING=y
@@ -419,10 +436,13 @@ CONFIG_IIO_SYSFS_TRIGGER=y
419436
CONFIG_PWM=y
420437
CONFIG_PWM_ROCKCHIP=y
421438
CONFIG_PHY_ROCKCHIP_USB=y
439+
CONFIG_PHY_ROCKCHIP_INNO_USB2=n
422440
CONFIG_PHY_ROCKCHIP_DP=y
441+
CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY=n
423442
CONFIG_ANDROID=y
424443
CONFIG_NVMEM=y
425444
CONFIG_ROCKCHIP_EFUSE=y
445+
CONFIG_RK_NAND=n
426446
CONFIG_EXT4_FS=y
427447
CONFIG_EXT4_FS_POSIX_ACL=y
428448
CONFIG_EXT4_FS_SECURITY=y

‎drivers/input/touchscreen/Kconfig‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1152,4 +1152,10 @@ config TOUCHSCREEN_ROHM_BU21023
11521152
config TOUCHSCREEN_VTL_CT36X
11531153
tristate "VTL touchscreens support"
11541154

1155+
config TOUCHSCREEN_TINKER_FT5406
1156+
tristate "tinker ft5406"
1157+
default y
1158+
depends on I2C
1159+
help
1160+
Control ft5406 touch ic.
11551161
endif

‎drivers/input/touchscreen/Makefile‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -99,3 +99,4 @@ obj-$(CONFIG_TOUCHSCREEN_ZFORCE) += zforce_ts.o
9999
obj-$(CONFIG_TOUCHSCREEN_COLIBRI_VF50) += colibri-vf50-ts.o
100100
obj-$(CONFIG_TOUCHSCREEN_ROHM_BU21023) += rohm_bu21023.o
101101
obj-$(CONFIG_TOUCHSCREEN_VTL_CT36X) += vtl_ts/
102+
obj-$(CONFIG_TOUCHSCREEN_TINKER_FT5406) += tinker_ft5406.o

‎drivers/iommu/rockchip-iommu.c‎

Lines changed: 0 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1272,26 +1272,6 @@ static int rk_iommu_probe(struct platform_device *pdev)
12721272
clk_prepare(iommu->hclk);
12731273
}
12741274

1275-
1276-
iommu->reset_disabled = device_property_read_bool(dev,
1277-
"rk_iommu,disable_reset_quirk");
1278-
1279-
iommu->aclk = devm_clk_get(dev, "aclk");
1280-
if (IS_ERR(iommu->aclk)) {
1281-
dev_info(dev, "can't get aclk\n");
1282-
iommu->aclk = NULL;
1283-
}
1284-
1285-
iommu->hclk = devm_clk_get(dev, "hclk");
1286-
if (IS_ERR(iommu->hclk)) {
1287-
dev_info(dev, "can't get hclk\n");
1288-
iommu->hclk = NULL;
1289-
}
1290-
1291-
if (iommu->aclk && iommu->hclk) {
1292-
clk_prepare(iommu->aclk);
1293-
clk_prepare(iommu->hclk);
1294-
}
12951275
pm_runtime_enable(iommu->dev);
12961276
pm_runtime_get_sync(iommu->dev);
12971277
list_add(&iommu->dev_node, &iommu_dev_list);

‎drivers/pinctrl/pinctrl-rockchip.c‎

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -2191,7 +2191,7 @@ static int _rockchip_pmx_gpio_set_direction(struct gpio_chip *chip,
21912191
/* For pin 185 and 186 are shorted. */
21922192
if (bank->pin_base + pin == 186)
21932193
input = true;
2194-
//clk_enable(bank->clk);
2194+
clk_enable(bank->clk);
21952195
raw_spin_lock_irqsave(&bank->slock, flags);
21962196

21972197
data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
@@ -2203,8 +2203,9 @@ static int _rockchip_pmx_gpio_set_direction(struct gpio_chip *chip,
22032203
if (bank->pin_base + pin == 185)
22042204
data &= ~BIT(2);
22052205
writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR);
2206+
22062207
raw_spin_unlock_irqrestore(&bank->slock, flags);
2207-
//clk_disable(bank->clk);
2208+
clk_disable(bank->clk);
22082209

22092210
return 0;
22102211
}
@@ -2653,7 +2654,7 @@ static void rockchip_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
26532654
unsigned long flags;
26542655
u32 data;
26552656

2656-
//clk_enable(bank->clk);
2657+
clk_enable(bank->clk);
26572658
raw_spin_lock_irqsave(&bank->slock, flags);
26582659

26592660
data = readl(reg);
@@ -2663,7 +2664,7 @@ static void rockchip_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
26632664
writel(data, reg);
26642665

26652666
raw_spin_unlock_irqrestore(&bank->slock, flags);
2666-
//clk_disable(bank->clk);
2667+
clk_disable(bank->clk);
26672668
}
26682669

26692670
/*
@@ -2675,9 +2676,9 @@ static int rockchip_gpio_get(struct gpio_chip *gc, unsigned offset)
26752676
struct rockchip_pin_bank *bank = gc_to_pin_bank(gc);
26762677
u32 data;
26772678

2678-
//clk_enable(bank->clk);
2679+
clk_enable(bank->clk);
26792680
data = readl(bank->reg_base + GPIO_EXT_PORT);
2680-
//clk_disable(bank->clk);
2681+
clk_disable(bank->clk);
26812682
data >>= offset;
26822683
data &= 1;
26832684
return data;
@@ -2814,7 +2815,7 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
28142815
if (ret < 0)
28152816
return ret;
28162817

2817-
//clk_enable(bank->clk);
2818+
clk_enable(bank->clk);
28182819
raw_spin_lock_irqsave(&bank->slock, flags);
28192820

28202821
data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
@@ -2872,7 +2873,7 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
28722873
default:
28732874
irq_gc_unlock(gc);
28742875
raw_spin_unlock_irqrestore(&bank->slock, flags);
2875-
//clk_disable(bank->clk);
2876+
clk_disable(bank->clk);
28762877
return -EINVAL;
28772878
}
28782879

@@ -2881,7 +2882,7 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
28812882

28822883
irq_gc_unlock(gc);
28832884
raw_spin_unlock_irqrestore(&bank->slock, flags);
2884-
//clk_disable(bank->clk);
2885+
clk_disable(bank->clk);
28852886

28862887
return 0;
28872888
}
@@ -2891,10 +2892,10 @@ static void rockchip_irq_suspend(struct irq_data *d)
28912892
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
28922893
struct rockchip_pin_bank *bank = gc->private;
28932894

2894-
//clk_enable(bank->clk);
2895+
clk_enable(bank->clk);
28952896
bank->saved_masks = irq_reg_readl(gc, GPIO_INTMASK);
28962897
irq_reg_writel(gc, ~gc->wake_active, GPIO_INTMASK);
2897-
//clk_disable(bank->clk);
2898+
clk_disable(bank->clk);
28982899
}
28992900

29002901
static void rockchip_irq_resume(struct irq_data *d)
@@ -2933,28 +2934,28 @@ static int rockchip_interrupts_register(struct platform_device *pdev,
29332934
unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
29342935
struct irq_chip_generic *gc;
29352936
int ret;
2936-
int i;
2937+
int i, j;
29372938

29382939
for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
29392940
if (!bank->valid) {
29402941
dev_warn(&pdev->dev, "bank %s is not valid\n",
29412942
bank->name);
29422943
continue;
29432944
}
2944-
/*
2945+
29452946
ret = clk_enable(bank->clk);
29462947
if (ret) {
29472948
dev_err(&pdev->dev, "failed to enable clock for bank %s\n",
29482949
bank->name);
29492950
continue;
29502951
}
2951-
*/
2952+
29522953
bank->domain = irq_domain_add_linear(bank->of_node, 32,
29532954
&irq_generic_chip_ops, NULL);
29542955
if (!bank->domain) {
29552956
dev_warn(&pdev->dev, "could not initialize irq domain for bank %s\n",
29562957
bank->name);
2957-
// clk_disable(bank->clk);
2958+
clk_disable(bank->clk);
29582959
continue;
29592960
}
29602961

@@ -2965,7 +2966,7 @@ static int rockchip_interrupts_register(struct platform_device *pdev,
29652966
dev_err(&pdev->dev, "could not alloc generic chips for bank %s\n",
29662967
bank->name);
29672968
irq_domain_remove(bank->domain);
2968-
// clk_disable(bank->clk);
2969+
clk_disable(bank->clk);
29692970
continue;
29702971
}
29712972

@@ -2983,8 +2984,8 @@ static int rockchip_interrupts_register(struct platform_device *pdev,
29832984
gc->chip_types[0].regs.mask = GPIO_INTMASK;
29842985
gc->chip_types[0].regs.ack = GPIO_PORTS_EOI;
29852986
gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
2986-
//gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;
2987-
//gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;
2987+
gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;
2988+
gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;
29882989
gc->chip_types[0].chip.irq_enable = rockchip_irq_enable;
29892990
gc->chip_types[0].chip.irq_disable = rockchip_irq_disable;
29902991
gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake;
@@ -2997,10 +2998,10 @@ static int rockchip_interrupts_register(struct platform_device *pdev,
29972998
rockchip_irq_demux, bank);
29982999

29993000
/* map the gpio irqs here, when the clock is still running */
3000-
/* for (j = 0 ; j < 32 ; j++)
3001+
for (j = 0 ; j < 32 ; j++)
30013002
irq_create_mapping(bank->domain, j);
30023003

3003-
clk_disable(bank->clk);*/
3004+
clk_disable(bank->clk);
30043005
}
30053006

30063007
return 0;
@@ -3118,8 +3119,7 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank,
31183119
if (IS_ERR(bank->clk))
31193120
return PTR_ERR(bank->clk);
31203121

3121-
//return clk_prepare(bank->clk);
3122-
return clk_prepare_enable(bank->clk);
3122+
return clk_prepare(bank->clk);
31233123
}
31243124

31253125
static const struct of_device_id rockchip_pinctrl_dt_match[];

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